 Method for manufacturing semiconductor device
专利摘要:
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, wherein a diffusion barrier layer is formed between a capacitor dielectric layer and upper and lower electrodes to ensure leakage current and capacitance of the capacitor, thereby improving semiconductor manufacturing process yield and characteristics of the semiconductor. It relates to a method for manufacturing a device. A method of manufacturing a semiconductor device according to the present invention includes forming a first oxide film, a lower or upper electrode, and a second oxide pattern on a semiconductor substrate, and then depositing a dielectric film on the entire structure to form a capacitor. In the process, by forming a diffusion barrier between the capacitor dielectric film and the lower or upper electrode, the reaction between the dielectric film and the upper and lower electrodes is suppressed, thereby preventing the consumption of the dielectric film, thereby ensuring a process margin, thereby facilitating the process. Can improve the reproducibility and reliability of the product. 公开号:KR20040061848A 申请号:KR1020020088148 申请日:2002-12-31 公开日:2004-07-07 发明作者:황순홍；김종관 申请人:주식회사 하이닉스반도체； IPC主号:
专利说明:
Method for manufacturing semiconductor device [13] BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device. In particular, a diffusion barrier is formed between a dielectric film and an upper or lower electrode in a capacitor structure of a semiconductor device to ensure the leakage current and capacitance of the capacitor. The present invention relates to a method for manufacturing a semiconductor device that can contribute to process yield improvement and device characteristics. [14] As the degree of integration of semiconductor devices increases, a capacitor structure for applying a high dielectric film is required. Accordingly, a dielectric film such as a metal organic compound or a metal oxide has been applied or studied. [15] FIG. 1 illustrates one of a capacitor having a metal insulator silicon (MIS) and a metal insulator metal (MIM) structure. As shown in FIG. 1, a tantalum oxide film (Ta 2 O 5 ) is used as the insulating film 11, and FIG. 3 illustrates a problem that occurs when TiN, which is a metal, is used as the electrode 13. [16] A chemical reaction occurs between two layers of the insulating layer 11 and the upper electrode or the lower electrode 13 to generate a thermal budget. In the illustrated structure, TiOx layers 15 and 17 are formed between the tantalum oxide film Ta 2 O 5 and the upper electrode 13. [17] That is, when metal organic or metal oxide is used as the dielectric film, the coating property of the dielectric film itself becomes poor in a capacitor having a three-dimensional geometric structure, and in this case, the device may fail due to deterioration of device characteristics. Therefore, there is a need for a technique of preventing a deterioration of characteristics by suppressing a reaction between the dielectric film and the upper and lower electrodes. [18] Therefore, the present invention is to solve the above problems, the present invention is to form a diffusion barrier between the capacitor dielectric layer and the upper and lower electrodes, using a three-phase material having excellent diffusion prevention characteristics as the diffusion barrier or diffusion suppression in the existing diffusion barrier It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of improving the yield of a semiconductor device and improving the reliability of the device by guaranteeing leakage current and capacitance of the capacitor by stuffing the material. [1] FIG. 1 illustrates one of capacitors having a conventional MIS and MIM structure, and illustrates a problem that occurs when a tantalum oxide film (Ta 2 O 5 ) is used as an insulating film and TiN is used as a lower or upper electrode. Cross-section, [2] 2 (a) and 2 (b) are cross-sectional views illustrating a method of forming a diffusion barrier film by a three-phase sputter target according to the method of the present invention; [3] 3 is a view showing a process of forming a diffusion barrier by chemical vapor deposition; [4] Figure 4 (a) and (b) is a view showing a method for improving the characteristics of the diffusion barrier film by the plasma or heat treatment after depositing the existing diffusion barrier film, [5] 5 (a) and 5 (b) are cross-sectional views showing the microstructures of the diffusion barrier film formed by plasma / heat treatment by the method of the present invention and the diffusion barrier film formed by the conventional method; [6] 6 (a) and 6 (b) are graphs showing the results of the characteristic experiments on the diffusion barrier formed by the method of the present invention and the diffusion barrier formed by the conventional method. [7] <Explanation of symbols for the main parts of the drawings> [8] 11 tantalum oxide layer (Ta 2 O 5 ) layer 13 metal (TiN) layer [9] 15: TaO X film 17: TiOx film [10] 21 semiconductor substrate 23 first oxide film [11] 25: lower (upper) electrode 27: second oxide film pattern [12] 29: dielectric film 31,37,41,50,51: diffusion barrier [19] A method of manufacturing a semiconductor device of the present invention for achieving the above object includes a step of sequentially forming a first oxide film, a lower or upper electrode, a second oxide film pattern on the semiconductor substrate, and then depositing a dielectric film on the entire structure. In the process of forming a capacitor, by forming a diffusion barrier between the capacitor dielectric film and the lower or upper electrode, the reaction between the dielectric film and the upper and lower electrodes is suppressed to prevent the consumption of the dielectric film to secure process margin It is easy and can improve the reproducibility of the process and the reliability of the product. [20] As the diffusion barrier of the present invention, it is advantageous to form a three-phase diffusion barrier, and the three-phase diffusion barrier may be formed by physical vapor deposition or chemical vapor deposition by sputtering. [21] Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of a method for manufacturing a semiconductor device according to the present invention. [22] 2 (a) and 2 (b) are cross-sectional views illustrating a method of forming a diffusion barrier film by a three-phase sputter target according to the method of the present invention. [23] Referring to FIG. 2A, the first oxide layer 23, the lower electrode 25, and the second oxide layer pattern 29 are sequentially formed on the semiconductor substrate 21, and then the dielectric layer 29 is formed on the entire structure. ) To a certain thickness. [24] FIG. 2B illustrates the formation of a diffusion barrier layer on the structure of the semiconductor device by a sputtering method, which is a physical method. [25] Referring to the drawings, the sputtering on the dielectric film 29 of the structure with a composite three-phase target 35 made by adding a material such as Si to the target 35 of the sputtering device, for example, a Ti or Ta target. The diffusion barrier film 31 is deposited by the process. [26] At this time, during the sputtering process, the three-phase diffusion barrier layer 31 is deposited on the dielectric layer 29 so that sputtering is performed in an N 2 gas or other gas atmosphere. [27] 3 is a view showing a process of forming a diffusion barrier film by chemical vapor deposition. [28] As shown in the drawing, the first oxide film 21, the lower electrode 25, the second oxide pattern 27, and the dielectric film 29 are sequentially formed on the semiconductor substrate 21. The diffusion barrier 37 is deposited by vapor deposition. The reactive gas 35 present on the diffusion barrier 37 in the drawings is gaseous chemically reactive elements present in the reaction chamber. [29] 4A and 4B illustrate a method of improving the characteristics of the diffusion barrier film by plasma or heat treatment after depositing a conventional diffusion barrier film. [30] That is, to form a diffusion barrier by sputtering, which is a physical method, the target 39 in the sputtering apparatus is a target 39 having general characteristics rather than the specially processed target used in FIG. A diffusion barrier 41 is formed first on the upper portion of (29) (see a). [31] Subsequently, an improved diffusion barrier layer 41 'is formed on the deposited diffusion barrier layer 41 by plasma nitradation or infiltration gas heat treatment to improve the characteristics thereof (see b). [32] 5 (a) and 5 (b) are cross-sectional views showing the microstructures of the diffusion barrier film formed by plasma / heat treatment by the method of the present invention and the diffusion barrier film formed by the conventional method. [33] (a) is a cross-sectional view showing the microstructure of the conventional diffusion barrier 50, [34] (b) is a cross-sectional view showing the microstructure of the diffusion barrier 51 according to the present invention. [35] As contrasted in the two figures shown, in the case of the diffusion barrier 51 according to the present invention, it is understood that the microatoms 53 are filled between the gap between the inside and the upper portion of the diffusion barrier 51. Can be. [36] 6 (a) and 6 (b) are graphs showing the results of the characteristic experiments on the diffusion barrier formed by the method of the present invention and the diffusion barrier formed by the conventional method. [37] (a) is a conventional case, it can be seen that WF 6 is exposed after the diffusion barrier film deposition, [38] (b) is a case of the present invention, it can be seen that WF 6 is exposed after heat treatment after the diffusion barrier film deposition. [39] That is, it can be seen that the characteristics of the diffusion barrier according to the present invention is excellent. [40] As described above, the present invention forms a diffusion barrier between the capacitor dielectric layer and the upper or lower electrode, but the reaction between the dielectric layer and the upper and lower electrodes by forming a diffusion barrier using a three-phase material having excellent diffusion prevention characteristics. It is possible to prevent the loss of the capacitance value by preventing the reaction of the dielectric film to be suppressed, thereby improving the reliability of the product and ensuring process reproducibility by securing process margins. In addition, it is possible to minimize the leakage current of the capacitor of the current MIS, MIM structure.
权利要求:
Claims (4) [1" claim-type="Currently amended] In the process of forming a capacitor, including forming a first oxide film, a lower or upper electrode, a second oxide pattern on the semiconductor substrate in turn, and then depositing a dielectric film over the entire structure, And forming a diffusion barrier layer between the capacitor dielectric layer and the lower or upper electrode. [2" claim-type="Currently amended] The method of claim 1, A method of manufacturing a semiconductor device, characterized in that the diffusion barrier is formed of a three-phase diffusion barrier. [3" claim-type="Currently amended] The method of claim 2, The three-phase diffusion barrier layer is formed using a physical vapor deposition method or a chemical vapor deposition method by a sputtering method. [4" claim-type="Currently amended] The method of claim 3 The target used when the physical vapor deposition method is applied is a method for manufacturing a semiconductor device, characterized in that the composite three-phase target manufactured by adding a material such as Si to the Ti or Ta target.
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法律状态:
2002-12-31|Application filed by 주식회사 하이닉스반도체 2002-12-31|Priority to KR1020020088148A 2004-07-07|Publication of KR20040061848A
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